76 research outputs found

    Hardware Architectures for Image Processing Acceleration

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    Towards a Dependable True Random Number Generator With Self-Repair Capabilities

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    Many secure-critical systems rely on true random number generators that must guarantee their operational functionality during its intended life. To this end, these generators are subject to intensive online testing in order to discover any flaws in their operation. The dependability of the different blocks that compose the system is crucial to guarantee the security. In this paper, we provide some general guidelines for designers to create more dependable true random number generators. In addition, a case of study where the system dependability has been improved is presented.This work was supported in part by ICT COST Action under Grant IC1204 and in part by the Spanish Ministry of Economy and Competitiveness under Grant ESP2015-68245-C4-1-P

    A Hybrid Fault-Tolerant LEON3 Soft Core Processor Implemented in Low-End SRAM FPGA

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    In this work we implemented a hybrid fault-tolerant LEON3 soft-core processor in a low-end FPGA (Artix-7) and evaluated its error detection capabilities through neutron irradiation and fault injection in an incremental manner. The error mitigation approach combines the use of SEC/DED codes for memories, a hardware monitor to detect control-flow errors, software-based techniques to detect data errors and configuration memory scrubbing with repair to avoid error accumulation. The proposed solution can significantly improve fault tolerance and can be fully embedded in a low-end FPGA, with reduced overhead and low intrusiveness

    Evaluating the soft error sensitivity of a GPU-based SoC for matrixmultiplication

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    System-on-Chip (SoC) devices can be composed of low-power multicore processors combined with a small graphics accelerator (or GPU) which offers a trade-off between computational capacity and low-power consumption. In this work we use the LLFI-GPU fault injection tool on one of these devices to compare the sensitivity to soft errors of two different CUDA versions of matrix multiplication benchmark. Specifically, we perform fault injection campaigns on a Jetson TK1 development kit, a board equipped with a SoC including an NVIDIA ”Kepler“ Graphics Processing Unit (GPU). We evaluate the effect of modifying the size of the problem and also the thread-block size on the behaviour of the algorithms. Our results show that the block version of the matrix multiplication benchmark that leverages the shared memory of the GPU is not only faster than the element-wise version, but it is also much more resilient to soft errors. We also use the cuda-gdb debugger to analyze the main causes of the crashes in the code due to soft errors. Our experiments show that most of the errors are due to accesses to invalid positions of the different memories of the GPU, which causes that the block version suffers a higher percentage of this kind of errors

    Partial TMR in FPGAs Using Approximate Logic Circuits

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    TMR is a very effective technique to mitigate SEU effects in FPGAs, but it is often expensive in terms of FPGA resource utilization and power consumption. For certain applications, Partial TMR can be used to trade off the reliability with the cost of mitigation. In this work we propose a new approach to build Partial TMR circuits for FPGAs using approximate logic circuits. This approach is scalable, with a fine granularity, and can provide a flexible balance between reliability and overheads. The proposed approach has been validated by the results of fault injection experiments and proton irradiation campaigns.This work was supported in part by the Spanish Ministry of Economy and Competitiveness under contract ESP2015-68245-C4-1-P

    Mineralogical and Sedimentological Characterization of the Clay-Rich Sediments from Ases Cave (Cova Dets Ases, Mallorca, Spain): Origin and Classification

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    The Mallorca coastal caves present large amounts of speleothems that have been studied for decades. However, the sedimentary deposits also present in these cases have not been given the same attention. This work is the first study entirely focused on these deposits, specifically the ones found in the Ases cave. These deposits are formed by clay minerals (illitic phases, kaolinite, smectite, and chlorite), calcite and quartz, and minor proportions of dolomite, albite, orthoclase, hematite, and goethite. The grain size and the electron microscopy studies suggested the presence of different sedimentation processes (bedrock degradation, creep or saltation, and suspension) and different origins (authigenic and detrital origins) for the different sediments. Based on these differences, two types of deposits were characterized: autochthonous and allochthonous deposits. The first ones are located on the floor of chambers and corridors in subaqueous zones, indicating the stability of the mixing zone (and therefore the sea level) over time. The second ones appear filling voids on the walls and the ceiling in the terrestrial zone, evidencing the filling of the cavity in the presence of water (during a wet period). These results are very important to complete the understanding of the caves and their evolution and support the relevance of these materials in paleoenvironmental studies

    On the Entropy of Oscillator-Based True Random Number Generators under Ionizing Radiation

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    The effects of ionizing radiation on field-programmable gate arrays (FPGAs) have been investigated in depth during the last decades. The impact of these effects is typically evaluated on implementations which have a deterministic behavior. In this article, two well-known true-random number generators (TRNGs) based on sampling jittery signals have been exposed to a Co-60 radiation source as in the standard tests for space conditions. The effects of the accumulated dose on these TRNGs, an in particular, its repercussion over their randomness quality (e.g., entropy or linear complexity), have been evaluated by using two National Institute of Standards and Technology (NIST) statistical test suites. The obtained results clearly show how the degradation of the statistical properties of these TRNGs increases with the accumulated dose. It is also notable that the deterioration of the TRNG (non-deterministic component) appears before that the degradation of the deterministic elements in the FPGA, which compromises the integrated circuit lifetime.Ministerio de EconomĂ­a y Competitividad (ESP-2015-68245-C4-1-P)Ministerio de EconomĂ­a y Competitividad (ESP-2015-68245-C4-4-P)Ministerio de EconomĂ­a y Empresa (TIN2016-79095-C2-2-R)CAM (S2013/ICE-3095

    Total Ionizing Dose Effects on a Delay-Based Physical Unclonable Function Implemented in FPGAs

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    Physical Unclonable Functions (PUFs) are hardware security primitives that are increasingly being used for authentication and key generation in ICs and FPGAs. For space systems, they are a promising approach to meet the needs for secure communications at low cost. To this purpose, it is essential to determine if they are reliable in the space radiation environment. In this work we evaluate the Total Ionizing Dose effects on a delay-based PUF implemented in SRAM-FPGA, namely a Ring Oscillator PUF. Several major quality metrics have been used to analyze the evolution of the PUF response with the total ionizing dose. Experimental results demonstrate that total ionizing dose has a perceptible effect on the quality of the PUF response, but it could still be used for space applications by making some appropriate corrections.Ministerio de EconomĂ­a y Competitividad ESP2015-68245-C4-1-P, ESP-2015-68245-C4-4-P
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